MTRR bringt ca 25 %


On Intel P6 family processors (Pentium Pro, Pentium II and later)
the Memory Type Range Registers (MTRRs) may be used to control
processor access to memory ranges. This is most useful when you have
a video (VGA) card on a PCI or AGP bus. Enabling write-combining
allows bus write transfers to be combined into a larger transfer
before bursting over the PCI/AGP bus. This can increase performance
of image write operations 2.5 times or more. This option creates a
/proc/mtrr file which may be used to manipulate your
MTRRs. Typically the X server should use this. This should have a
reasonably generic interface so that similar control registers on
other processors can be easily supported.

The Cyrix 6x86, 6x86MX and M II processors have Address Range
Registers (ARRs) which provide a similar functionality to MTRRs. For
these, the ARRs are used to emulate the MTRRs.

The AMD K6-2 (stepping 8 and above) and K6-3 processors have two
MTRRs. These are supported.

The Centaur C6 (WinChip) and WinChip 2&3 processors have 8 MCRs.
These are supported. Note that, due to the design of the WinChip 2&3,
setting the access for normal memory to uncachable or write-combine
on these processors will result in instant kernel panic. It is okay
to set this for non-cacheable (video) memory.

Saying Y here also fixes a problem with buggy SMP BIOSes which only
set the MTRRs for the boot CPU and not the secondary CPUs. This can
lead to all sorts of problems.

You can safely say Y even if your machine doesn't have MTRRs, you'll
just add about 3k to your kernel.

See Documentation/mtrr.txt for more information.